专利名称：NAND-type dynamic RAM having temporary
storage register and sense amplifiercoupled to multi-open bit lines
发明人：Takehiro Hasegawa,Yukihito Oowaki,Fujio
Masuoka,Ryu Ogiwara,ShinichiroShiratake,Shigeyoshi Watanabe
申请号：US08/446291申请日：19950522公开号：US05625602A公开日：19970429
摘要：A sense amplifier is connected between memory cell arrays, a re- writingregister is arranged in position adjacent to the sense amplifier, transfer gates aredisposed between the sense amplifier and the memory cell arrays, transfer gates areprovided between bit lines of the memory cell arrays and global bit lines, and a gatecontrol circuit for controlling the transfer gates is provided. When readout data is writteninto the register, the node of the sense amplifier is electrically separated from the bitlines and global bit lines.
申请人：KABUSHIKI KAISHA TOSHIBA
代理机构：Oblon, Spivak, McClelland, Maier & Neustadt, P
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