LM3401 Hysteretic PFET Controller for High Power LED DriveAugust 2007
LM3401
Hysteretic PFET Controller for High Power LED Drive
General Description
The LM3401 is a switching controller designed to provideconstant current to high power LEDs. The LM3401 drives anexternal P-MOSFET switch for step-down (Buck) regulators.The LM3401 delivers constant current within ±6% accuracyto a wide variety and number of series connected LEDs. Out-put current is adjusted with an external current sensing resis-tor to drive high power LEDs in excess of 1A.
For improved accuracy and efficiency, the LM3401 featuresdual-side hysteresis, very low reference voltage, and shortpropagation delay. A cycle by cycle current limit provides pro-tection against over current and short circuit failures. Addi-tional features include adjustable hysteresis and a CMOScompatible input pin for PWM dimming.
Features
■■■■■■■■■■
Hysteretic Control for Speed and SimplicityInput Operating Range of 4.5V-35V1.5MHz maximum switching frequencyLow 200mV reference voltageProgrammable current limit
High speed CMOS compatible enable/dimmingAdjustable hysteresisInput UVLO
No output capacitor requiredMSOP-8 package
Applications
■LED Driver
■Battery Charger
Typical Application Circuit
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LM3401Connection Diagram
Top View
8-Lead Plastic MSOP
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Ordering Information
Part NumberLM3401MMLM3401MMX
Package TypeMSOP-8
NS Package Drawing
MUA08A
Supplied As
1000 Units on Tape and Reel3500 Units on Tape and Reel
Pin Descriptions
Pin #12345678
Pin Name
CSDIMSNSHYSGNDHGVINILIM
Description
Current sense pin. Connect to the PFET drain
Dimming input pin. When DIM is low, the HG drive is off. Can be connected to a logic level PWM signalCurrent feedback pin – to LED cathode. Connect a resistor from this pin to ground to set the DC LEDcurrent
Hysteresis adjust pin. Connect a resistor from this pin to GND to set the hysteresis windowGround pin
Gate drive output. Connect to the PFET gatePower supply input
Current limit adjust pin. Connect a resistor from this pin to the PFET source to set the current limit threshold
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LM3401Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.VINCSSNSILIMDIMHYS
Storage Temperature
-0.3V to 36V-2.0V to 36V-0.3V to 8V-0.3V to 36V-0.3V to 36V-0.3V to 4V-65°C to +150°C
Lead Temperature
Vapor Phase (60sec) Infrared (15sec)ESD Rating (Note 2)Human Body Model 215°C220C
2.5kV
(Note 1)
4.5V to 35V-40°C to +125°C
151°C/W0.66W
Operating Ratings
VIN
Junction Temperature RangeThermal Resistance θJA (Note 3)Power Dissispation (Note 3)
Electrical Characteristics
Specifications in standard type are for TJ = 25°C only, and limits in boldface type
apply over the junction temperature (TJ) range of -40°C to +125°C. Unless otherwise stated, VIN = 24V. Minimum and Maximumlimits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm atTJ = 25°C, and are provided for reference purposes only (Note 4).Symbol
ParameterReference VoltageLine regulation
Operating VIN Current (Note 5)Hysteresis Pin Source CurrentSNS Comparator Hysteresis MultiplierSNS Comparator to HG DelayDIM to HG DelayILIM Pin Sink Current
Current Limit Comparator OffsetZero Cross Comparator ThresholdDIM Threshold VoltageHysteresis
ISNSUVLO
SNS pin Bias CurrentUVLO thresholdHysteresis
Conditions
5V < VIN < 35V
HYS pin = 50 mV to 500 mVHYS pin = 250 mVSNS risingDIM rising
Measured at CS pin
VSNS = 200 mVVin rising
Source Current = 100 mASink Current = 100 mASource, HG = VIN -2.5VSink, HG = VIN -2.5V
Referenced to VIN, steady state voltage
Min188 150.168 4-10-701.85 -4.2
Typ2000.0021.05200.2046695.50-1302.02863004.30.51505.310.50.410.33-4.7
Max212 250.224801208+10-2002.25 7804.48 -5.5
UnitsmVmV/VmAµA-nsnsµAmVmVVmVnAVVnsΩΩAAV
SYSTEM
VREFΔVREF / ΔVIN
IQIHYSSNSHYS_MU
TDLYTDIMIILIMVCL_OFFVZCVDIM
DRIVER
Ton_minRHGIHG VHG
Minimum on-timeGate Drive Resistance
Driver Output Current
HG on voltage
Note 1:Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. Operating Ratings indicate conditions for which the device isintended to be functional, but do not guarantee specific performance limits. For guaranteed specifications, see Electrical Characteristics.Note 2:The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 3:The maximum allowable power dissipation is a function of the maximum junction temperature, TJ_MAX, the junction-to-ambient thermal resistance, θJA,and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated using: PD_MAX = (TJ_MAX - TA)/θJA. Themaximum power dissipation of 0.66W is determined using TA = 25°C, θJA = 151°C/W, and TJ_MAX = 125°C. θJA will vary with board size and copper area. TheθJA spec is based on a JEDEC standard 4-layer board.
Note 4:All room temperature limits are 100% production tested. All limits at temperature extremes are guaranteed through correlation using standard StatisticalQuality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).Note 5:IQ specifies the current into the VIN pin and applies to non-switching operation.
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LM3401Typical Performance Characteristics
VREF vs Temperature
Unless otherwise specified, VIN = 24V, TA = 25°C.
HYS Current vs VIN
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HYS Multiplier vs TemperatureStartup Waveforms
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ILIM Sink Current vs TemperatureHYS Current vs Temperature
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LM3401UVLO Threshold vs Temperature
SNS to HG Propagation Delay vs VIN
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Line Transient ResponseInitial HG Voltage vs Input Voltage
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350 mA Efficiency700 mA and 1A Efficiency
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LM3401Block Diagram
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FIGURE 1. Block Diagram
Operational Description
HYSTERETIC CONTROL
The LM3401 is a step-down DC-DC controller designed toprovide a constant current source for driving a high powerLED string.
The LM3401 uses comparator-based voltage mode hystereticcontrol for a simple and stable design. Hysteretic control doesnot utilize an internal oscillator, but relies on output conditionsto directly control switching. The LM3401 controls LED cur-rent within the adjustable hysteresis window by monitoringpeak and valley voltage at the SNS pin. A dual sided hystere-sis window is used to optimize accuracy.
Regulated LED current flows to ground through a sense re-sistor at the SNS pin. The voltage generated at the SNS pinis compared to the 200 mV internal reference. When the SNSvoltage falls below the reference voltage minus hysteresis,the output of the hysteretic comparator goes low. This resultsin the driver output, HG, pulling the gate of the PFET low andturning on the PFET.
With the PFET on, LED current ramps up through the PFETand the inductor. As the LED current increases, the SNS volt-age reaches its upper threshold (reference voltage plus hys-teresis). This forces the output of the comparator and HG togo high, which turns the PFET off. When the PFET turns off,current flows through the catch diode, and LED and inductorcurrent ramp down. When the SNS voltage falls to its lowerthreshold, the cycle repeats. The resulting LED current, SNS,and switch node waveforms are shown in Figure 2.
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FIGURE 2. Hysteretic Switching WaveformsOUTPUT CURRENT SETTING
The LED average current is programmed using a resistor be-tween SNS and GND, shown as R1 in the typical applicationschematic. The SNS resistor (RSNS) can be calculated as fol-lows:
Where VSNS is 200 mV typically, and ILED is the DC averageLED current.
The sense resistor power rating must be higher than its powerdissipation. The required power rating can be calculated (inWatts) as follows:
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LM3401WRSNS = VSNS x ILED
When selecting a sense resistor, thermal de-rating must alsobe taken into consideration.
While RSNS sets the DC LED current, the AC peak LED cur-rent will be higher than the DC setting. This peak current mustnot be greater than the maximum peak current rating of theLED, ILED_max. Peak LED current can be calculated from theequation below:
more precise equation should be used to determine the actualripple current and LED peak current. Larger hysteresis valueswill result in lower switching frequency and higher ripple cur-rent for a given inductor. Typical examples are shown inFigure 3 below.
The LED ripple current, ILED_RIP, is described below in theHysteresis Adjust section.
HYSTERESIS ADJUST
Adjustable hysteresis (via the HYS pin) provides direct controlover the LED ripple current. The HYS pin also gives somecontrol over the switching frequency. Although the hysteresisvalue can be set after the inductor is selected, a preliminaryvalue must be set in order to begin the frequency calculation.The hysteresis window must be set small enough to keep thepeak LED current below its maximum rating, ILED_max.
The maximum SNS pin hysteresis can be calculated asshown:
SNSHYS_MAX = (ILED_max - ILED) x RSNS
Any SNSHYS value between 10mV and this maximum is ac-ceptable.
The SNSHYS value is set with a single resistor from the HYSpin to GND, shown as R2 in the typical application schematic.The HYS pin voltage, VHYS, is internally multiplied bySNSHYS_MU (0.2 typical) to generate the hysteresis at the SNSpin, SNSHYS. The hysteresis setting resistor can be deter-mined from the following equation:
SWITCHING FREQUENCY
Although hysteretic control is a simple control method, theswitching frequency depends on application conditions andcomponents. If the inductance, input voltage, or LED forwardvoltage is changed, there will be a change in the switchingfrequency. Therefore, care must be taken to select compo-nents which will provide the desired frequency range. Usually,the best approach is to determine a nominal switching fre-quency for the application and then select the inductor ac-cordingly. Once the inductor is selected, VHYS can be adjustedto set the frequency range more precisely. This design pro-cess usually involves a few iterations to select appropriatestandard values that will result in the desired frequency andripple current.
Switching frequency can be approximately calculated usingthe formula:
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FIGURE 3. Switching Frequency and Ripple Current vs
Hysteresis
Where 20 µA is the typical HYS source current, andSNSHYS is the resulting SNS pin hysteresis voltage. The hys-teresis voltage can be set within a range of 10 mV to 100 mV(50 mV to 500 mV at the HYS pin). The SNSHYS value definesboth the upper and lower threshold of the SNS pin. For ex-ample, with a VHYS setting of 100 mV, SNSHYS will be 20 mV.Therefore, the total hysteretic window will be 40 mV, or 20 mVabove and 20mV below the 200 mV reference voltage. Thisdirectly correlates to peak-to-peak inductor and LED ripplecurrent, approximated by the following equation:
If LED ripple current is a design priority, the preliminary R2value can be determined using a target LED ripple current asshown:
Where D is the duty cycle, defined as (VOUT + VDIODE) / VIN,VANODE is 200 mV plus the sum of LED forward voltages, anddelay is the sum of the LM3401 propagation delay time andthe PFET delay time. The LM3401 propagation delay is 46 nstypically (See the Propagation Delay curve). Alternately, theinductor value can be calculated from a known frequency byre-arranging the same equation:
A more precise equation for ripple current is given in the In-ductor Selection section. Once an inductor is selected the
Switching frequency for a typical application is shown in Fig-ure 4 along with the calculated frequency.
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LM3401RIPPLE REDUCTION CAPACITOR
The typical application schematic shown on the front page isthe simplest application of the LM3401. In this schematic, in-ductor current is equal to LED current. Therefore, the equa-tions for ripple current apply to both LED ripple and inductorripple.
However, LED ripple current can be reduced without alteringthe inductor current by using a bypass capacitor placed inparallel with the LED string (shown as C2 in the Figure 11schematic).
This allows larger hysteresis values to be used while signifi-cantly reducing ripple current in the LED string. Figure 5 belowshows this effect: inductor ripple current is unaffected whileLED ripple current is dramatically reduced.
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FIGURE 4. Frequency vs Input Voltage
Maximum switching frequency will typically occur around theinput voltage which corresponds to 25% duty cycle.
If the input voltage falls below the forward voltage of the LEDstring, the LM3401 will operate at 100% duty cycle. In thisstate, the anode voltage will be equal to the input voltage andLED current is determined by the v-i curve of the LED. At100% duty cycle, LED current will be continuous with a max-imum value equal to the ILED_PK level set at the HYS pin.In some applications, maximum operating frequency will belimited by the minimum on-time as shown in the followingequation:
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FIGURE 5. LED Ripple Current Reduction with a 1 µF
Ripple Reduction CapacitorIf a ripple reduction capacitor is used, the equation forSNSHYS_MAX only applies for 100% duty operation.
LED average DC current and peak inductor current are notaffected by the ripple reduction capacitor. However, LEDpeak current is reduced and switching frequency may shiftslightly.
Any type of capacitor can be used, provided the working volt-age rating is sufficient. In general, higher capacitance andlower ESR will provide more ripple reduction; a typical valuegreater than 100 nF is recommended. Smaller capacitancevalues will be less effective, and large ESR values may ac-tually increase LED ripple current.
Despite its effectiveness to smooth LED ripple current, thereare two notable disadvantages to using a ripple reduction ca-pacitor.
First, when used, care must be taken to avoid shorting theLED anode to ground. If this occurs, the capacitor will force alarge negative voltage spike at the SNS pin which could dam-age the IC.
Second, this capacitor will limit the maximum PWM dimmingfrequency because it takes some additional time to chargeand discharge. Additionally, ceramic capacitors can generateaudible noise due to fast voltage changes during dimming. Toreduce audible noise, use the smallest possible case size,use dimming frequencies below 500 Hz, or use a non-ceramicripple reduction capacitor.
A small bypass capacitor, in the range of 100 pF to 200 pFcan also be used to reduce high frequency switching noise.This is recommended in higher current applications, where
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When the on-time reaches minimum (150 ns typical) due toincreasing input voltage, the frequency will be reduced in or-der to maintain the proper duty cycle.
INDUCTOR SELECTION
The most important parameters for the inductor are the in-ductance and the current rating. The LM3401 operates overa wide frequency range and can use a wide range of induc-tance values.
Once an inductance value is determined from the frequencyequation, the maximum operating current must be verified.Although peak-to-peak ripple current is controlled by the hys-teresis value, there is some variation due to propagationdelay. This means that the inductance has a direct effect onLED current line regulation.
In general, a larger inductor will result in lower frequency andbetter line regulation. The actual peak-to-peak inductor cur-rent can be calculated as follows:
Use the maximum value of Vin to determine the worst caseILED_RIP value. This value should be used to determine thepeak current, ILED_PK, shown in the Output Current Settingsection.
Since the LM3401 can operate at 100% duty cycle, the in-ductor must be rated to handle ILED_PK continuously.
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LM3401switching noise can adversely affect the SNS or DIM pins. Asmall capacitor for noise reduction will have little to no effecton the LED ripple current or dimming but may help solve po-tential EMI problems.
HG AND PFET SELECTION
When switching, the HG pin swings from VIN (off state) to 4.7Vbelow VIN (typical). As long as the DIM pin is high and the SNSpin is below the upper threshold, HG will stay low, driving thePFET on.
The PFET should be selected based on the maximum Drain-Source voltage (VDS), Drain current rating (Id), maximumGate-Source voltage (VGS), on-resistance (RDS(on)), and Gatecapacitance.
The voltage across the PFET in the off state is equal to thesum of the input voltage and the diode forward voltage. TheVDS must therefore be selected to provide some margin be-yond this voltage.
Since the peak current through the PFET is equal to the peakcurrent through the inductor, Id must be rated higher than themaximum ILED_PK. The LM3401 is capable of 100% duty cy-cle, therefore, the PFET drain current should be rated tohandle ILED_PK continuously. In this case there is no ripple, soIPK = IAVE.
Although the typical HG voltage is VIN - 4.7V, this voltage cango much lower during the initial PFET turn-on time. How farHG swings at turn-on depends on several factors includingthe gate capacitance, on-time, and input voltage. As shownin the Typical Performance Characteristics, the initial HG volt-age swing increases with decreasing PFET gate capacitance.Therefore, A PFET must be selected with a maximum VGSrating larger than the initial HG voltage. Conversely, whendriving PFETs with larger gate capacitance, the initial HGvoltage will be lower. In some cases, a low VGS thresholdPFET may be required to ensure complete turn-on. Use theTypical Performance curve as a guideline to selecting a prop-er PFET.
Note that HG will eventually settle around the typical voltageof VIN - 4.7V regardless of the PFET gate capacitance.
HG has an absolute minimum voltage of 1.2V typically. Whenthe input voltage is below approximately 6V, this minimumlimit causes a reduction in drive voltage. At 5V input, for ex-ample, HG will swing to 1.2V (or a gate drive voltage of -3.8V).This may not be sufficient to drive some PFETs, and at thisreduced HG voltage, RDS(on) is likely to increase and triggercurrent limit. Therefore, a low VGS threshold PFET is alsorecommended for lower input voltage applications.
The power loss in the PFET consists of switching losses andconducting losses. Although switching losses are difficult toprecisely calculate, the equations below can be used to esti-mate total power dissipation, which is the sum of PDCOND andPDSW.
PDFET_COND = RDS(on) x ILED2 x D
value at 25°C. The Gate capacitance of the PFET has a directimpact on both PFET transition time and the power dissipationin the LM3401. Most of the power dissipated in the LM3401is used to drive the PFET switch. This power can be calcu-lated as follows:
The average amount of gate driver current required duringswitching (IG) is:
IG = Qg x fSW
Where Qg is the PFET gate charge.
And the total power dissipated in the IC is:
PD = (Iq x VIN) + (IG x 4.7V)
Where Iq is typically 1.05 mA and 4.7V is the typical HG volt-age.
Maximum power dissipation within the LM3401 is limited byambient temperature. Use the following equation to deter-mine maximum allowable power dissipation, or maximumallowable ambient temperature:
Where θJA is the typical thermal resistance of 151°C/W. Ingeneral, keeping the gate capacitance below 2000 pF is rec-ommended to keep propagation delay, switching losses, andpower losses low. PFETs with very fast rise times may causeexcessive ringing at the HG node when combined with theinductance of a long HG trace. To reduce this ringing, a smallresistor can be added between HG and the PFET gate. Atypical value of 10Ω is usually sufficient.
CURRENT LIMIT OPERATION
The LM3401 current limit monitors inductor current at eachswitching cycle. Current is sensed across the RDS(on) of thePFET at the CS pin. When the PFET current exceeds thecurrent limit threshold, HG is turned off and the current limitlatch is set. In current limit mode, the PFET is held off until theinductor current falls to near zero.
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Where Pon = PFET turn-on time, Poff = PFET turn-off time, andD is the duty cycle. A value of 10 ns to 50 ns is typical for tonand toff. Longer PFET on and off times will degrade both effi-ciency and accuracy.
Increasing RDS(on) will increase power losses and degrade ef-ficiency. FET RDS(on) has a positive temperature coefficient. At125°C, the RDS(on) may be as much as 150% higher than the
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FIGURE 6. Typical Current Limit Operation
The current limit threshold is adjusted with a setting resistor,shown as R3 in the typical application schematic, connectedfrom ILIM to the VIN node of the PFET.
An internal 5.5 µA (typical) current sink at the ILIM pin createsa voltage across the setting resistor. This voltage is compared
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LM3401to the sensed voltage at the CS pin. Current limit is activatedand latched when the voltage at the CS pin drops below thevoltage at the ILIM pin.
The current limit setting resistor, R3, can be calculated fromthe equation below. The minimum current limit occurs at max-imum RDS(on) and minimum IILIM value.
limited by the inductor size and input voltage to anode voltageratio. Less inductance and higher VIN/VANODE ratios will allowthe inductor and LED current to increase faster, thus allowingfor a faster PWM frequency, or lower dimming duty cycle.
Where 4 µA is the minimum IILIM value and ILIM_PK is the peakinductor current limit threshold. ILIM_PK should be set some-what higher than the maximum LED current, ILED_PK, to avoidfalse current limit triggering. The temperature variation of thePFET RDS(on) will result in an equivalent variation in currentlimit. To ensure that current limit is not falsely triggered, usethe highest RDS(on) value over the temperature range to setthe R3 value.
When current limit is activated, the HG driver remains off untilthe CS voltage rises to -130 mV (typical). This ensures thatinductor current is close to 0A when the current limit latch isreleased. The actual minimum inductor current will depend onthe catch diode forward voltage characteristic, which deter-mines the CS pin negative voltage.
Although the LM3401 monitors voltage at the CS pin to resetthe current limit, there is also a minimum off time of typically3 µs. When current limit is triggered, HG will be turned off forat least this amount of time, regardless of the inductor current.The current limit comparator imposes typically 150 ns ofblanking time at the beginning of each switching cycle. Thisensures that the PFET is fully on and any switch node ringinghas dissipated when the current is sensed. However a slowerPFET may not fully turn on within the blanking time. In thiscase, the current limit threshold must be increased or a fasterPFET must be used.
Because the current limit comparator has a limited differentialvoltage capability, a maximum of 1MΩ is recommended forR3.
PWM DIMMING
The DIM pin is a CMOS compatible input for a PWM (PulseWidth Modulation) dimming signal. PWM dimming adjustsLED brightness by varying the duty cycle, which varies theaverage LED current. This type of dimming is recommended,because LED peak current remains constant regardless ofbrightness, which results in more predictable LED color andperformance as compared to analog dimming. Figure 7shows a typical PWM dimming waveform.
When DIM is high (above 2V typically) the LM3401 operatesnormally and the LED string will be driven at the set current.When pulled low, DIM will disable HG and switching will stop.The PFET will remain off as long as DIM is low. When theLM3401 is powered up or enabled with the DIM pin, the LEDcurrent will very rapidly increase to its set point.
There is minimal delay time between a DIM logic change andHG switching. Also, because the LM3401 requires no outputcapacitor, minimal time is required to ramp-up the LED cur-rent. This allows for low duty cycle, high frequency PWMdimming signals to be used.
A dimming frequency greater than 100 Hz is recommendedto avoid visible flicker. The LM3401 is capable of PWM dim-ming frequencies up to 10 kHz with a duty cycle between 1and 100%. Any DIM signal pulse width longer than 100 ns canbe used. In most cases, the maximum dimming frequency is
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FIGURE 7. Typical PWM DIM Signal and LED Current
L = 22 µHDIM is a high impedance pin, which is somewhat sensitive tonoise. If there is excessive switching noise at the DIM pin, asmall bypass filter capacitor can be used. See the Ripple Re-duction Capacitor section. VIN can also be used for PWMdimming when a logic signal is not available. In this mode ofoperation DIM should be connected to VIN through a 10 kΩresistor. There is typically 10 us of startup delay time whenusing VIN for dimming. Depending on the application, this de-lay limits the maximum dimming frequency to typically severalhundred Hz.
Higher dimming frequency and lower dimming duty cycle canbe achieved by using a FET switch in parallel with the LEDstring. This is shown in Figure 8 below.
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FIGURE 8. Parallel FET Dimming
When the FET switches on, inductor current flows through theFET and the regulated average inductor current is un-changed. Using this method, inductor current rise time doesnot limit the dimming frequency. A ripple reduction capacitorshould not be used with the parallel FET dimming methodsince it significantly slows the LED current rise time. However,a small noise filter capacitor can be used.
INPUT CAPACITOR SELECTION
An input bypass capacitor is required between VIN andground. The input capacitor prevents large voltage transients
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LM3401at the input and provides the instantaneous current when thePFET turns on. The important parameters for the input ca-pacitor are the voltage rating and the RMS current rating.Follow the manufacturer’s recommended voltage de-rating.RMS current can be calculated with the equation below. Thehighest RMS current will occur around 50% duty cycle.
A ceramic input capacitor must be placed close to the drainof the PFET. This minimizes the trace inductance betweenVIN and the PFET, which is a source of switching noise. If theinput capacitor is not properly located, switching noise cancause current limit and stability problems.
CATCH DIODE SELECTION
The catch diode provides the current path to the LED stringduring the PFET off-time and must be rated higher than theaverage current through the diode, which can be calculatedas shown:
IDIODE = ILED x (1-D)
The peak reverse voltage across the catch diode is approxi-mately equal to the input voltage. Therefore, the diode’s peakreverse voltage rating should be larger than the maximum in-put voltage, plus some safety margin.
A Schottky diode is recommended because its low forwardvoltage maximizes efficiency. For high temperature applica-tions, diode leakage current may become significant andrequire a higher reverse voltage rating or a low leakage diodeto achieve acceptable performance.
LED CURRENT ACCURACY
The total accuracy of average LED current is affected by sev-eral factors, both internal and external to the LM3401. Totalstatic accuracy is the part-to-part variation and can be calcu-lated from the equation below:
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FIGURE 9. LED DC current line regulation LED Vf = 7.0VFor most applications, the average LED current will be thehighest at the maximum input voltage and lowest at a dutycycle somewhat greater than 50%. The maximum LED cur-rent variation can be estimated as:
Where VIN_60% is the input voltage corresponding to a dutycycle of 60%. Since the actual input voltage where minimumLED current occurs varies with the application, this is an ap-proximation. As the duty cycle approaches 100%, the aver-age LED current will approach ILED_PK. The average LEDcurrent will be the highest at the point that 100% duty cycle isreached. In the case that 100% duty cycle can occur, maxi-mum LED current variation is calculated as:
Where the worst case VSNS% is ±6%, and RSNS% is the senseresistor accuracy. Because these factors are not correlated,the RSS (root-sum-square) method of calculation is used.The LED current will also show some variation with input volt-age. This is primarily due to propagation delay and the dy-namic resistance of the LED. In longer on-time operation, theerror due to dynamic resistance tends to dominate, while atshorter on-time, the propagation delay will dominate. Thesetwo effects counteract each other, resulting in typical regula-tion curves similar to those shown in Figure 9. A larger induc-tor will reduce the error due to propagation delay and willresult in better overall line regulation.
PCB LAYOUT
PCB layout is very important in all switching regulator de-signs. Poor layout can cause EMI problems, excess switchingnoise, and improper device operation. The following keypoints should be followed to ensure a quality layout.
Traces carrying large AC currents should be as wide andshort as possible to minimize trace inductance. These areas,shown as darker regions in Figure 10, are:- VIN between the input capacitor and PFET
- GND between the input capacitor and catch diode- The switch node
As shown in Figure 10, place the input capacitor ground asclose as possible to the anode of the catch diode. The VINside of the input capacitor should be placed close to the topof the PFET.
The CS node (the node connecting the catch diode cathode,inductor, and PFET source) should be kept as small as pos-sible. This node is one of the main sources for radiated EMI.The SNS and HYS pins are sensitive to noise. Be sure to routethe SNS trace away from the inductor and the switch node,which are sources of noise.
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LM3401The SNS and HYS resistors should be placed close to theirrespective pins and grounded close to the GND pin. An iso-lated ground area shown as SGND in Figure 10 is recom-mended for the SNS, HYS, and GND pin connections. Thetwo ground areas, GND and SGND, should be connected onan inner or bottom layer. This connection is shown as two viasin Figure 10.
A large, continuous ground plane can also be used, as longas the input capacitor and catch diode ground area is some-what isolated.
The HG trace should be kept as short as possible to minimizeinductance and gate ringing (See HG and PFET selectionsection).
Finally, for accurate current limit sensing, the CS pin and ILIMresistor connections should be made at the PFET pads, viaseparate traces.
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FIGURE 10. Example PCB Layout
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LM3401Design Example
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FIGURE 11. Example Circuit
The following design example is intended to illustrate thestep-by-step design process described in the previous sec-tions. The example refers to the circuit in Figure 11, and theresults are summaized in Table 1. The resulting circuit willdrive a string of 2 Luxeon V Star LEDs at 700 mA from aninput voltage between 18V and 35V.
The example LEDs have a maximum DC current rating of 700mA, a forward voltage of 5.4V to 8.3V, and a maximum peakcurrent rating of 1.0A.
First, set the LED DC current with R1:
For 1 MHz switching frequency and 25 mV hysteresis, induc-tance can be calculated. Because frequency varies with inputvoltage and LED forward voltage, for this calculation, assumetypical values of 24V and 13.6V respectively, and a PFETdelay time of 15 ns.
And the required wattage is:
WRSNS = 700 mA2 x 0.286 = 140 mW
Select a standard value of 290 mΩ, 1/4W resistor, which willresult in a 690 mA LED DC current.
To keep the peak LED current below ILED_MAX, the maximumhysteresis is determined by:
SNSHYS_MAX = (1.0A - .690A) x 0.29Ω = 90 mVWhich gives a maximum R2 value of:
Select a value of 33 µH and the hysteresis can be adjusteddownward by re-arranging the same frequency equation:
This gives a new R2 value of 5.6k. This will result in a typicaloperating frequency of 1 MHz at 24VIN. Next, it must be ver-ified that the peak LED current is within the maximum allowed.For now, the design is created without using a ripple reductioncapacitor. Therefore, LED ripple current is equal to inductorripple current. Maximum LED ripple current is calculated as:
Next, a preferred switching frequency of 1 MHz is selected forthis example.
Since this is a relatively high switching frequency, a low start-ing point of 25 mV is selected for the comparator hysteresisto maintain good line regulation. This will allow a larger in-ductor at the same operating frequency and is well below thecalculated maximum. Set a preliminary hysteresis value withR2:
Note that the maximum input voltage and minimum anodevoltage were used for this worst case calculation.Now peak LED current can be determined:
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LM3401This confirms that the component selections will keep LEDpeak current below the maximum LED rating. Notice if a ripplereduction capacitor is chosen, the peak inductor current is still804mA, but the LED peak current is reduced. Therefore, theinductor must be rated for a DC current greater than 804 mA.Now that the inductor value has been selected and verified,the operating frequency range can be determined. Lowestoperating frequency occurs at minimum input voltage andmaximum anode voltage. For this example the values are 18Vminimum input and 16.8V maximum anode voltage (200 mVSNS voltage plus the maximum LED forward voltages) andcalculate:
With the selected components, the maximum ambient tem-perature is above 100°C, sufficient for most applications. Notethat this limit applies to the IC only and depends on the pcbtype and size. Lower ambient temperature limits may apply tothe PFET and other components.
Now the current limit threshold is set with R3 at 0.95A, whichis 120% of the maximum peak current. The worst case RDS(on) value at 125°C is used, which is 150% of nominal, and theworst case ILIM pin sink current.
At duty cycles close to 100% (96% in this case) the frequencyequation becomes less accurate. Actual switching frequencywill typically be lower than the calculated value.
To estimate maximum operating frequency, calculate using aVin which corresponds to a duty cycle of 25%. In this example,25% duty cycle would occur above 35VIN, therefore maximumfrequency will occur at the maximum input voltage:
The typical current limit threshold will be higher than 1A andcan be determined by using typical values for RDS(on) andILIM sink current. The PFET, inductor, and catch diode mustbe able to handle this current for short periods of time.
The next component is the input capacitor, C1. A low ESRceramic capacitor must be used and properly located on thePCB. For this design, the capacitor working voltage must berated to at least 40V, and 50V is recommended. A 2.2 µF inputcapacitor should be sufficient, assuming a good PCB layout.The worst case input RMS current is calculated below 50% atduty cycle:
It must be verified that the selected input capacitor can toler-ate this current. An additional bulk capacitor placed at theinput voltage connection is also recommended.
Next, select D1, the catch diode. A Schottky diode should beused. The reverse voltage rating must be greater than 35Vand the average forward current rating must be greater than:
Using the equation in the Switching Frequency section, it canbe verified that this maximum frequency is within the minimumon-time limited frequency (and below the maximum operatingfrequency).
The maximum frequency calculation is only an estimate, theactual maximum should be verified on the bench.
The next step is to select a PFET. The critical PFET param-eters must meet the minimum circuit requirements of 35Vinput, 804 mA DC current, and adequate gate drive voltagerating.
Therefore, select a PFET with the following ratings:40V maximum VDS-20V maximum VGS1.8A continuous Id
130mohm maximum RDS(on)
Typically the PFET may be only sourcing 690 mA for about50% duty cycle. However, at minimum input voltage the dutycycle will increase close to 100%. Therefore, the PFET Id rat-ing should be based on its continuous, not pulsed, currentcapability.
Now the power dissipation should be verified. Assume theselected PFET has a gate capacitance of 200 pF, which iswithin recommendation, and a gate charge of 15 nC. Maxi-mum frequency and input voltage are used for a worst casecalculation:
IG = 15 nC x 1.1 MHz = 16.5 mA
PD = (1.05 mA x 35V) + (16.5 mA x 4.7V) = 0.114WTa_max = 125°C - (151°C/W x 0.114W) = 108°C
IDIODE = 690 mA x (1 - 0.31) = 480 mA
This calculation assumes the minimum duty cycle, which ismaximum input voltage and minimum anode voltage. Thediode must also be able to handle peak currents as high asthe current limit threshold for short periods. We select a 1Adiode to ensure adequate capability over temperature.
If desired, a ripple reduction capacitor can be added at C2 toreduce the LED ripple current. A minimum starting value of100 nF is recommended for C2, and a value of 1 µF will workwell in most applications. In case of an open LED failure, theripple reduction capacitor must be rated to the maximum inputvoltage of 35V. If C2 is used, LED ripple current is reducedand the calculated maximum R2 value no longer applies as alimit.
Finally, check the accuracy. The static accuracy is calculatedbelow using a 1% sense resistor.
To estimate line regulation, maximum input voltage and 60%duty cycle input voltage is used. For this example 60% dutycycle occurs at (13.6V + 0.2V)/0.60 or 23V input.
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LM3401This is the estimated amount of LED current variation over theinput voltage range. If the minimum input voltage was below17V, the LED current variation would be calculated using the100% duty cycle equation.
TABLE 1. Design Example Summary
Parameter
R1R2L1fswIrippleILED_PKPFETR3C1D1AccuracyRegulationTa_maxC2
Value290 mΩ5.6 kΩ33 µH, >804 mA
---40V, 1.8A, 130 mΩ
46 kΩ
2.2 µF, 50V ceramic
40V, 1A±6.1%1.6%108°C1.0 µF, 50V
Result690 mA DC±22.4 mV hysteresis
1MHz typical227 mA p-p804 mA
0.95A minimum peak current limit
>345 mA rms
±42 mA max variation11 mA variation
LED ripple reduction
Comment
1%
VHYS = 112 mV(adjustable)
219 kHz minworst caseworst case
adjustable
Schottkypart-to-partvs VINworst caseoptional
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LM3401Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead MSOP PackageNS Package Number MUA08A
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LM3401Notes
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LM3401 Hysteretic PFET Controller for High Power LED DriveNotes
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